Astables – AS Electronics Revision

Definitions

  • An astable is a system that has no stable state
  • They’re sometimes called clocks, as they repeatedly switch between high and low outputs (like clockwork)
  • They don’t need trigger pulses to get them going (unlike monostables)
  • They produce a digital waveform which can be described using several properties:
  • The period (capital T) is the time for it to complete one waveform shape – i.e. go high for a while once, then go low for a while once (or vice versa)
  • The mark to space ratio is the ratio of t1:t2
  • t1 is the amount of time the waveform is high for, each cycle
  • t2 is the amount of time it’s low for, each cycle
  • t1+t2=T, the period
  • Oh, and the frequency is 1 divided by the period (also works the other way)
  • The notes also mention something called the duty cycle, although I’ve never  seen a question on it…
  • The duty cycle is the percentage of the period for which the output is high, i.e. t1/T*100%

Double Inverter Astable

  • Wow, this one’s gonna be difficult to explain without drawing!
  • Y’know… I’m not going to bother. Look it up. (In you notes, maybe).
  • It’s effectively two monostable timing circuits joined together, so you can quite easily set the high and low times individually, allowing you control of the mark to space ratio

Relaxation Oscillator / Schmitt Astable

  • This one uses a Schmitt trigger/inverter/NOT gate or whatever you want to call it
  • The important thing is that it has different switching thresholds for rising voltages and falling voltages (it also inverts its output)
  • The hysteresis effect is indicated in its symbol by some curved lines
  • You can make it into an astable if you connect a capacitor to its input, connect the other end of the capacitor to 0V, and stick a resistor across the input and output (of the gate). The astable output can then be obtained at the gate’s output
  • It’s not magically getting volts out of nowhere just because there’s no supply voltage in the diagram – the Schmitt is an IC that’s connected to a supply and to ground
  • I won’t go into the workings, because I don’t quite remember how it works. There hasn’t been a question on that in any of the past papers I’ve done
  • The frequency is 1/RC, as stated in the ET2 paper
  • The period is 1/frequency, so I suppose the period is just RC (resistor * capacitor)
  • This assumes that the gate draws no current (has infinite input impedance), and that its switching thresholds are just right
  • The downside with this one is that you can’t control its mark to space ratio – only the period/frequency is customizable

555 Astable

  • R1 is the resistor between the supply and pin 7

    Circuit diagram of a standard 555 Astable circ...

    Circuit diagram of a standard 555 Astable circuit. The design equations can be found http://en.wikibooks.org/w/index.php?title=Practical_Electronics/Astables/555#Design_equations here. (Photo credit: Wikipedia)

  • R2 is the resistor below R1 (on the diagram), between pin 7 and pin 6 (it’s also connected to pin 2, and the capacitor)
  • C is the capacitor
  • (The other capacitor, the one on pin 5, doesn’t have anything to do with the timing)
  • The equations for time high (t1), time low (t2) and frequency (1/period) are given in the ET2 paper
  • I won’t pretend to know how a 555 astable works. Ask someone else. (I’m kinda rushing this last-minute blog-revision. Not literally last minute, but I’ve got to sleep, eat and stuff before taking the exam. Plus, I’ve lessons tomorrow morning)
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About Matt

I like writing, filmmaking, programming and gaming, and prefer creating media to consuming it. On the topic of consumption, I'm also a big fan of eating.
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